ROM contents and tools of the Floppy-Speeder Professional-DOS, Version 1As with many other floppy speeders for the C64 and C1541, the Kernal ROM of the C64 and the DOS ROM of the C1541 needs to be replaced for Professional-DOS.Firmware and tools download
C64 Kernal ROMWith the first versions of Professional-DOS, many users got the ability to modify existing speeder firmware with a special ROM patch utility to create a C64 Kernal ROM their own. This way the user didn't need to learn other command sets, but could the already known of the old speeder.For the Professional-DOS version presented here the C64 Kernal was missing since it arrived, but one patch utitlity could be found, that creates a Kernal out of an existing SpeedDOS floppy speeder system. This way a C64 Kernal for Professional-DOS Version 1 could be created. You can find this utility as well as the ready built C64 Kernal ROM in a ZIP archive below. C1541 DOS ROMThe EPROM of the drive expansion board doesn't not only contain the drive replacement ROM located in the C1541 memory map from 0xe000 to 0xffff. It also contains additional ROM code, that is mapped to the memory location 0x8000-0x9fff (this is only valid for Version 1). The floppy ROM located from 0xc000 to 0xdfff remains untouched.When you insert the drive expansion board, you have to remove the main (upper) DOS ROM as the manual says, because the replacement ROM is already supplied with the board. Some logic of the board splits the 16KB EPROM (27128) into two parts and maps each half to another memory location of the drive's memory map. The EPROM adresses from 0x0000 to 0x1fff are mapped onto the drive's addresses from 0xe000 to 0xffff. EPROM adresses from 0x2000 to 0x3fff are mapped to the drive's addresses 0x8000 to 0x9fff. The ROM code, that has been added, mainly contains fast GCR decoding routines as well as some big decoding tables. But these routines will not work without the special hardware extensions given by the drive expansion board. As far as the GCR decoding process could be revealed until now, the decoding routines only selects the right table and stores the decoded bytes. The hardware does the whole rest: splitting a byte into nibbles and decoding each nibble with the help of the big GCR tables. At each step, one of the nibbles is intermediately stored in an internal 4-Bit register for the next step. All you can see (if you disassemble the ROM) are many consecutive LDA and ORA instructions, that make no sense under normal circumstances, e.g. (to understand the comments, you probably would have to look at the PROM table and the functional description in the electronics section first): ...The first of the doubled LDA instructions above may be some initialization for the internal 4-Bit latch, the second one starts the decoding process of one GCR group (decoding 5 GCR bytes – 10 nibbles – into 4 normal bytes). It does mess up your brain, how this is working, doesn't it? By the way: The drive GCR table ROM cannot be read out with "M-R" floppy commands, because of the additional nibble dispatch hardware on the expansion board. To read out the floppy ROM you really need an EPROM burner or similar device.C1541 additional RAMThe drive expansion board also brings an additional 8K static RAM into the drive's memory map. This 8K RAM is located at the addresses from 0xa000 to 0xbfff. Take note, that this is only valid for Version 1 of Professional-DOS. Later revisions mapped the extra ROM and RAM into the address space from 0x4000 to 0x7fff. | ||||||||||||||